High Performance RF CMOS
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If you do RFIC circuit design and need a CMOS semiconductor process that ticks all the boxes, then check out Sapphicon's Silicon-on-Sapphire technology.
Silicon-on-Sapphire (SoS) process technology is used to create RF CMOS integrated circuits in a thin layer of silicon on an insulating substrate of Sapphire. The insulating substrate eliminates parasitic capacitance.
This provides a range of benefits that are not available on other bulk CMOS, SiGe or GaAs processes including:
- High performance RF: fmax typically 3X ft (60 GHz at 0.5 µm; and 100 GHz at 0.25 µm)
- Integration of RF, High Q passives, mixed signal, digital, memory and EEPROM on a single die
- Very high linearity transistors (+38 dBm IP3 mixers)
- High Q integrated inductors (QL > 40 at 2 GHz for 5 nH inductor)
- High isolation (>50 dB between adjacent devices)
- Integrated EEPROM available without additional masks or process steps
- Multiple threshold options without additional cost
- An extremely low-loss substrate at RF frequencies
- Excellent ESD protection with low parasitics
- Enables new design options compared to GaAs due to availability of good PMOS transistors
- Optically transparent substrate for use in optical applications
- Processed in standard CMOS facilities on large wafers
- Lower cost than other RF processes
Choose a simpler semiconductor process
SoS is also a much simpler process than bulk CMOS and other more exotic processes e.g. Silicon Germanium (SiGe) and this reduces the cost of tooling and setup. The following diagrams show how the technology allows much simpler transistors to be created than on normal bulk CMOS processes.
Cross-section of normal Bulk CMOS
Cross-section showing the much simpler structure of Silicon-on-Sapphire process